****************************** LILLIPUT DSO TARGEY BOARD VER 1.0 LILLIPUT SamSung MCU S3C2440 Program Ver 1.0(2006613) FCLK = 400000000Hz, USB Crystal Type: 12M **************************** * LOADBOOT * * * * LILLIPUT * * (2004) * **************************** Boot to load (Y/N)? Wait for Enter............... DSO TARGEY BOARD VER 1.0 That looked very promising.

But nothing happened when i pressed Y or Enter, the bootloader would just continue and load the oscilloscope firmware. I finally gave up on the serial port and started looking for a JTAG port. I later disassembled the bootloader and discovered that it listens for the character “u” and this makes the bootloader stop and wait for a connection over USB. As far as I can tell there are no other characters or magic phrases that makes it do something else.

Reverse Engineering The OWON SDS7102 Oscilloscope. And the software has one or two annoying bugs. I’m on vacation and the weather isn’t too nice so I’ve spent waay to. Test Equipment Oscilloscope and more. 'OWON SmartTest' designs and delivers test equipment to meet the needs of both professional industries and educational sectors. OWON is dedicated to make professional equipment more 'affordable' and 'adorable' ever in satisfying the needs of engineers.

I did find code in the disassembly for some kind of command prompt but I haven’t figured out how to access it. The command prompt might have been disabled permanently even though there are traces left of it in the code.

JTAG is an acronym for Joint Test Action Group which was originally a standard for testing assembled PCB. Using something called Boundary Scan it is possible to control all the I/O pins of an IC and this can be used to to verify that all the pins of an IC are connected correctly.

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For ICs with a built in processor, such as the ARM CPU in the Samsung S3C2416, it can provide a debug interface to the procesor. The mandatory pins for a JTAG port are Test Clock (TCK), Test Mode Select (TMS), Test Data In (TDI), and Test Data Out (TDO). Optional pins are Test Reset (TRST) which is used to reset the JTAG interface itself or System Reset (SRST) which is the reset for the whole system. It’s also good practice to have a voltage reference (VREF) pin with the voltage that should be used to drive all the other pins. It’s of course also necessary to have a ground (GND) pin.

This makes about half a dozen pins but they can be arranged in many different ways. Sometimes a PCB doesn’t even even have a JTAG connector, the JTAG pins can be spread out over the PCB or only accessible as test points or at a component pad. Sometimes JTAG is hidden, either by covering it with a sticker or by having JTAG on a piece of the PCB that is broken off from the main PCB after manufacturing. There was space on the SDS7102 for a 2mm 2x5 connector that looked very promising though. Probing it with a multimeter showed that the five pins on one side were all connected to VCC or GND and the other pins were connected to a couple of resistors. If this was a JTAG port four of the pins on the other side would be the mandatory pins and the fifth probably a reset or not connected at all.

There is a list of but it only contains a fraction of all possible and used pinouts. And unfortunately none of the connector pinouts matched the one I’d found. There is an interesting project called which uses a custom built piece of hardware to test all pin combinations by brute force.

There are also some interesting slides and videos on that page with more details on how to discover JTAG interfaces in a device. I didn’t have to do any of this though. That “tinhead” had already figured out the pinout and posted about it on the. The pinout of the connector is. RST 1 2 GND TMS 3 4 GND TDO 5 6 GND TDI 7 8 VCC TCK 9 10 VCC I soldered some wires to both the JTAG port and the serial port. I then put the scope back together with the wires sticking out on the side: The three loose wires are transmit, receive and ground from the serial port. The big connector is compatible with a that I had lying around.